The present circuits and methods relate to automatic gain control (AGC). AGC circuits stabilize the amplitude of an input signal using a feedback circuit or loop. AGC circuits have been implemented in both analog and digital forms.
The emergence of the mobile telecommunications market has made the desire for small, inexpensive and power efficient radio-frequency (RF) circuit components paramount. One of the major challenges in the design of an efficient and inexpensive communication system is frequency synthesis of a local oscillator signal. Frequency synthesis is usually accomplished using a phase-locked loop (PLL). A PLL generally includes components like a phase detector, an amplifier, and a voltage-controlled oscillator (VCO). A feedback control signal within a closed loop causes the output frequency to be a multiple of a reference frequency. The reference frequency is typically provided by the VCO.
Despite numerous advances, VCOs remain a critical design component in numerous RF communication devices. Important design parameters for VCOs include phase noise, power consumption and frequency range. To date, low-power, low-phase noise VCOs are based on the resonant frequency of an inductor-capacitor (LC) tank circuit.
An example of a Low-Noise, Low-Power Voltage Controlled Oscillator with Automatic Amplitude Control for Wireless Applications was presented by Mihai A. Margarit et al. in June of 1999. See, for example, FIG. 2 of Margarit et al. The feedback circuit or loop is enabled via an analog implementation with a peak detector, a reference voltage generator, a transconductance amplifier and low-pass filters. The peak signal level is compared to the output of the reference to generate an error signal. The error signal voltage is amplified and used as a control signal to increase or decrease the amplitude.
Traditional peak detectors suffer from both bandwidth limitations and matching issues. These limitations increase the amplitude tolerance in comparison to digital methods. A large tolerance places a significant burden on the design of downstream circuits. This burden and the complexity of these circuits increases with signal power.
In addition, the use of traditional peak detectors and transconductance amplifiers introduces phase noise into the output of the VCO. Phase noise directly affects signal jitter, which is undesirable for clock signal applications.